MMIO generally refers to a mechanism for performing input/output operations, e.g., between a processor and peripheral devices in a computer. For example, designated or reserved areas of a memory device that are addressable by a processor (e.g., for read and write operations) may be mapped to select input/output (“I/O” or “IO”) device(s). In this fashion, communication between processors and I/O devices may be performed through a memory device.
Some current processor and chipset handling of MMIO access by a processor (for example in memory marked “Uncached” (UC)) may be dictated by legacy compatibility concerns that may generally be much more conservative than is necessary for the majority of implementations. Some attempts have been made to work around this by defining new memory space types such as Write-Combining (WC), but such approaches may be configured by system software, and so may only be used when requiring the implementation of new system software and also when potentially new application software is acceptable. Very often this is not acceptable because of increased costs and time to market, and instead one may need to live with the performance consequences of behaviors that may be almost always needlessly conservative.